1. Field of the Invention
This invention relates to a semiconductor device comprising transistors with gate all around (GAA) structures and a manufacturing method thereof.
2. Description of the Related Art
For example, in a memory cell of a spin-transfer type MRAM, one path is used both for writing and reading. Therefore, it is required to provide a large current in the write operation and a small leak current in the read operation. That is, in the MRAM, it is desired to set a high ON/OFF ratio for the cell transistor. As a cell transistor having a high ON/OFF ratio, a gate all around (GAA) transistor is proposed (for example, see Ming Li, et al., Int. Electron Devices Meet. 2007, 899).
The GAA transistor comprises silicon (Si) films used as source-drain diffusion layers and connected via a thin silicon Si nano-wire used as a channel. A gate electrode is formed to surround the Si nano-wire. Since the GAA transistor comprises a fine Si nano-wire as a channel, it is possible to form a channel without injecting an impurity into a channel region. Therefore, ballistic transport is realized since electrons that are moving are suppressed from colliding with impurities or the like and scattering within the GAA transistor.
However, since the parasitic capacitance and parasitic resistance of the GAA transistor are high because of the fine structure, the operation speed and drive current may be degraded. For example, if the Si nano-wire is miniaturized, the Si film used as the diffusion layer is also made fine (thin). As a result, the resistance of the diffusion layer portion increases and the parasitic resistance becomes high. Accordingly, the drive current of the transistor is reduced due to the high parasitic resistance.